Design and Analysis of Online Arithmetic Operators for Streaming Data in FPGAs
نویسنده
چکیده
Online addition and multiplication of streaming data is of prime importance in real time processing of digital signals.The choice of data representation varies from fixedpoint for improved precision and reduced complexity to floatingpoint for increased dynamic range. The bit level granularity of FPGAs permits the choice of standard and nonstandard number representations for hardware accelerators. In this paper, novel architectures for online multiplication of fixed and floating point numbers that are suitable for FPGA implementations are presented. Analysis of higher radix and parameterized designs that represent a tradeoff between throughput, latency, speed of operation and complexityenables the choice of a suitable data format. Fused add-multiply and multiply-add operatorsusing a novel addersubtractor unit are also presented.
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